2017-02-07 Intel MIC Programming Workshop @ IT4I

Annotation

The course discusses Intel’s Many Integrated Core (MIC) architecture. It covers various programming and optimisation techniques for Intel  Xeon Phi coprocessors. We will mainly focus on the KNC version of the chip. The hands-on sessions are done on the new Intel Xeon Phi based Salomon system at the Czech National Supercomputing Centre IT4Innovations. We also plan a session with invited talks about Intel Xeon Phi experience on Salomon on Wendesday afternoon (tbc).

The course is developed within the joint German-Czech Republic project CzeBaCCA. A two-day workshop on "High performance computing in atmosphere modelling and air related environmental hazards" of this project will take place at IT4Innovations directly after this course, on February 9-10, 2017 - see its web page (http://www.lrz.de/services/compute/courses/2017-02-09_harh1w16/ ) for details.

About the tutors

Volker Weinberg studied physics at the Ludwig Maximilian University of Munich and later worked at the research centre DESY. He received his PhD from the Free University of Berlin for his studies in the field of lattice QCD. Since 2008 he is working in the HPC group at the Leibniz Supercomputing Centre and is responsible for HPC and PATC (PRACE Advanced Training Centre) courses at LRZ, new programming languages and the Intel Xeon Phi based system SuperMIC. Within PRACE-4IP he took over the leadership to create Best Practice Guides for new architectures and systems.

Momme Allalen received his Ph.D in theoretical Physics from the University of Osnabrück in 2006. He worked in the field of molecular magnetics through modelling techniques such as the exact numerical diagonalisation of the Heisenberg model. He joined the Leibniz Computing Centre (LRZ) in 2007 working in the High Performance Computing group. His tasks include user support, optimisation and parallelisation of scientific application codes, and benchmarking for characterising and evaluating the performance of high-end supercomputers. His research interests are various aspects of parallel computing and new programming languages and paradigms.

Branislav Jansik has obtained his PhD in computational chemistry at Royal Institute of Technology, Sweden in 2004. He took postdoctoral position at IPCF, Consiglio Niazionale delle Ricerche, Italy,  to carry on development and applications of high performance computational methods for molecular optical properties. Since 2006 he worked on development of highly parallel optimization methods in the domain of electronic structure theory at Aarhus University, Denmark. In 2012 he joined IT4Innovations, the Czech national supercomputing center as a head of supercomputing services. He published over 35 papers and co-authored the DALTON electronic structure theory code.

Preliminary schedule

Fees

The event is provided free of charge for the participants.

Capacity

30 attendees

Practicalities

• See a page on transport and accommodation (in Czech) how to get to the campus of  VŠB - Technical University Ostrava and to the IT4Innovations building.
• Participants without the IT4Innovations card please arrive early enough to settle the formalities with obtaining an entry permit.
• Computer systems' documentation is available at http://support.it4i.cz/docs.